Logic Technology Development , Resolution Enhancement Techniques (RET) is responsible for the research, development and implementation of RET for nanoscale process technologies. Investigates potential inventions typically 2 to 4 years prior to being applied to a product.
Scope includes models and software to perform layout correction for high resolution reproduction on wafers. Applies software engineering methods, theories and research in the investigation and solution of technical RET problems.
In this job responsibilities will include but will not be limited to:
Defines and selects new approaches and implementation of RET software engineering applications, design specifications and parameters.
Maintains substantial knowledge of state-of-the-art principles and theories in lithography, optics, resists, modeling, and software engineering.
Contributes to the development of intellectual property in the domain of RET. Coordinates interdepartmental activities and research efforts.
Willing to interact with both VLSI design and silicon process technology development, and mask making communities to ensure solutions are optimal.
Use predictive modeling, statistics, machine learning, and other data analysis techniques to collect, explore, visualize, and to develop software algorithms and applications to compensate for physical effects in photolithography imaging and etch pattern transferal process.
Additionally, understanding in:
Optical Proximity Correction (OPC) simulations.
OPC model calibration or recipe optimization and code validation.
Development of novel OPC model or correction capabilities.
The candidate should possess the below behavioral traits:
Problem-solving, data mining and analytics,
Attentiveness to detail.
Effectively communicate, collaborate and align with team members, customers
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences
Minimum Qualifications:
Candidates must possess a Ph.D. in Electrical, Chemical, or Mechanical Engineering; Mathematics, Optics, Nano-Engineering, Materials Science, Physics or Related Scientific Discipline.
5+ years experience in Optical Proximity Correction (OPC) models, simulations, or correction algorithms. Experience must be using modern, state-of-the-art OPC software tools and techniques. Candidate should be capable of independently developing OPC models or correction algorithms, and should have knowledge of relevant design and lithography interactions.
Candidates must have at least one of the following qualifications:
3+ years experience in C++ Programming or Python scripting, Statistics packages such as JMP, or general scientific applications such as MATLAB or Mathematica.
3+ years of experience in algorithm development.
Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art - from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.
Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.