Raimund Ubar

Computer Engineering Department
Tallinn University of Technology

Publications

http://www.etis.ee
R.Ubar, J.Raik, H.-T.Vierhaus. Design and Test Technology for Dependable Systems-on-Chip. IGI Global, 2011, 550 p.
R.Ubar, S.Devadze, J.Raik, A.Jutman. Parallel X-Fault Simulation with Critical Path Tracing Technique. IEEE Conf. Design, Automation & Test in Europe – DATE-2010, Dresden, Germany, March 8-12, 2010, pp. 1-6.